1. Field of the Invention
The invention relates to a flip chip package structure and a wafer level package structure, and particularly relates to a flip chip package structure and a wafer level package structure having a greater alignment tolerance.
2. Description of Related Art
Common bonding technologies for light emitting diodes include bonding wire and flip chip. In addition, the flip chip bonding technology is known for its characteristics of reducing the size of chip package and reducing the path for signal transmission. Thus, the technology has been broadly applied in the package of light emitting diode.
FIG. 1 is a schematic view illustrating a conventional flip chip package structure. Referring to FIG. 1, a conventional flip chip package structure 10 includes a package base 20 and a light emitting diode chip 30. The package base 20 includes a first substrate 21, a first electrode 22, a second electrode 23, and a first insulating layer 24. The first electrode 22, the second electrode 23, and the first insulating layer 24 are disposed on the first substrate 21, and the first insulating layer 24 are located between the first electrode 22 and the second electrode 23. The light emitting diode chip 30 includes a second substrate 31, an epitaxy layer 32, a third electrode 33, a fourth electrode 34, and a second insulating layer 35. The epitaxy layer 32 is disposed on the second substrate 31, and the third electrode 33, the fourth electrode 34, and the second insulating layer 35 are located on the epitaxy layer 32. The light emitting diode chip 30 is flipped on the package base 20, the first electrode 22 contacts the third electrode 33, and the second electrode 23 contacts the fourth electrode 34, making the light emitting diode chip 30 and the package base 20 electrically connected.
When the light emitting diode 30 is aligned to the package base 20, contact of the first electrode 22 to the fourth electrode 34 or contact of the second electrode 23 to the third electrode 33 needs to be prevented. One solution to prevent such contacts is to increase an interval between the first electrode 22 and the second electrode 23 and an interval between the third electrode 33 and the fourth electrode 34 to increase tolerance to an alignment error of the conventional flip chip package structure 10. However, increasing the interval between the first electrode 22 and the second electrode 23 and the interval between the third electrode 33 and the fourth electrode 34 makes a bonding region between the package base 20 and the light emitting diode chip 30 (i.e. a middle region in FIG. 1) smaller, making a structural strength of the flip chip package structure 10 reduced and thus increasing the change of failure of the flip chip package structure 10.